For operation under large DC current loads, conventional voltage multiplying circuits, such as the Cockcroft-Walton (CW) AC-to-DC converter shown in FIG. 11, require large capacitance values that cannot be implemented by solid-state devices unless impractically large device areas are used. The CW is made up of a voltage multiplier ladder network of capacitors 1102, 1104, 1106, 1108 and diodes 1110, 1112, 1114, 1116 to generate high voltages. The CW is attached to an AC input voltage 1118. At the time when the AC input voltage 1118 reaches its negative pole the leftmost diode 1110 is allowing current to flow from the ground into the first capacitor 1102, charging it up. When the same AC signal reverses polarity, current flows through the second diode 1112 charging up the second capacitor with both the positive end from AC source and the first capacitor, charging the second capacitor 1106 to twice the charge held in the first. With each change in polarity of the input, the capacitors add to the upstream charge and boost the voltage level of the capacitors downstream, towards the output 1120.
As a result of the required large capacitor values, despite the availability of high voltage diodes, it may not be practical to implement these conventional voltage multiplying circuits as integrated circuits. For example, assume 10 nF metal-insulator-metal capacitors fabricated with 2 μm silicon dioxide dielectric layers having a large area of 6 cm2, allowing a breakdown voltage of 2.5 KV. Further, assume GaN Schottky diodes with the same breakdown voltages of 2.5 KV. Under such assumptions, voltage multiplication from 2.5 KV (peak-to-peak) to 5 KV (using a 2 stage multiplier) and 10 KV (using a 4 stage multiplier) is expected, under 75 KHz and 500 KHz operation, respectively. Although it is possible in principle to implement such a voltage multiplier as an integrated circuit, the area consumed by the high voltage capacitors is impractically large for typical applications.